MOS large scale integrated circuits have become increasingly popular in the electronics market because of their ability to provide high component densities at low cost per function at moderate speeds and relatively low power dissipation. However, for optimum performance, a plurality of relatively high power supply lines, commonly designated VDD and VGG as well as the ground conductor have been required. Improvements in the state-of-the-art MOSFET processing techniques have been developed to provide MOS chips which operate from the same relatively low voltage, for example, 5 volts, as popular bipolar integrated circuit logic families, for example, TLL, etc. However, it has been difficult to obtain the required circuit speeds for MOS LSI circuits at such low power supplies. Further, with the very high component density on MOS LSI integrated circuit chips, a large number of circuit functions per chip are obtainable, and a serious problem exists in providing enough leads and bonding pads for the semiconductor package and chip to provide the necessary signals for operation of the complex logic functions. Further, at such low power supply voltages, variations in the MOS processing parameters, especially the MOS threshold voltage V to become more significant, making far more difficult the design of certain logic circuits on the chip under worst case conditions. Further, at such low power supply voltages, the voltage drops across the long metallization lines on the chip which distribute the supply voltage become significant and make more difficult design of logic elements located distant from the power supply bonding pad. In some cases, bootstrap inverter circuits and drivers have been used to produce high voltage pulses which provide the additional required drive to particular MOSFETs, usually MOSFET load devices, which need to generate a large magnitude signal with a fast rise time. But the variation and the magnitude of such pulses with processing variations has usually been in the opposite sense required for optimum circuit design. Further, race conditions normally associated with digital pulse generating circuitry further compound the problem of getting adequate high voltage signals to particular MOSFETs for the required period of time.
It is an object of the invention to provide an improved voltage booster circuit.
It is a further object of the invention to provide a voltage booster circuit fabricated with metal oxide semiconductor field effect transistors (MOSFETs).
It is a further object of the invention to provide an integrated circuit chip with at least one internal circuit which generates a DC voltage greater in magnitude than any voltage externally applied to the integrated circuit chip.
It is a further object of the invention to provide an integrated circuit chip with a plurality of internal voltage booster circuits which are located so as to distribute the stepped up DC voltage to nearby portions of the circuit requiring such stepped up voltage.